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Capacitance of a 3-D Interconnect in a VLSI circuit Application


Description

In recent years, the electrical characterization of 3D interconnects in VLSI has become increasingly important. This trend can be attributed primarily to the increase of interconnect layers and clock speed of modern days VLSI. A prime characterization of the interconnects is how to calculate capacitance matrix of 3D structures.

In this validation example, we show you how to calculate capacitance of an interconnect, consisting of six conductors embedded in a seven dielectric layers, is considered. As indicated in Figure 1, four of the six conductors cross over two ninty degrees bends. 

 

Six conductors embedded in a set of  seven dielectric layers

Figure 1 - Six conductors embedded in a set of  seven dielectric layers

 

Each straight conductor has a length of 13mm. The cross-section of all conductors is 1mm × 1mm. As shown in Figure 1, the piecewise lengths of the bent conductors are a = b = 13mm, and S1 = 3.5mm, S2 = 3mm. The relative permittivity of the dielectric layers are, from the bottom, er1 = 2, er2 = 3, er3 = 3, er4 = 4, er5 = 4, er6 = 5, er7 = 5.
The thickness of each layer is 1mm, except the third layer from the bottom. It has a thickness of 2mm. The total height of the structure is 8mm. The air around the structure must be also included in the model. In the published article,  the domain-decomposition method (DDM) is used as a capacitance calculator of the considered interconnect. We wish to validate the results of EMS against the published data [1] for the capacitance calculation.

 

Solid model of the seven layers interconnect

Figure 2 - Solid model of the seven layers interconnect

 

The study

The Electrostatic module of EMS is used as capacitance calculator for the 3D multilayered-interconnect structure at hand. After creating the Electrostatic study, or the design scenario, in EMS, three important steps shall always be followed. That is, apply the proper material for all solid bodies, apply the necessary boundary conditions, or the so called Loads/Restraints in EMS, and mesh the entire model.

Materials

In the Electrostatic analysis of EMS, the only required material property is the relative permittivity, which is shown in Table 1 for the seven insulators and the surrounding air.

 
Component/Body
Material Name
Relative Permittivity
Air
Air
1.0
Dielectric 1
e2
2.0
Dielectric 2
e3
3.0
Dielectric 3
e3
3.0
Dielectric 4
e4
4.0
Dielectric 5
e4
4.0
Dielectric 6
e5
5.0
Dielectric 7
e5
5.0

Table 1 - Relative permittivity of the seven insulators and the surrounding air
 

Loads/Restraints

Loads and restraints are necessary to define the electric and magnetic environment of the model. The results of analysis directly depend on the specified loads and restraints. Loads and restraints are applied to geometric entities as features that are fully associative to geometry and automatically adjusted to geometric changes.

In this study a grounded conductor is applied on the top and bottom faces of the seventh and the first dielectric layers, respectively. The conductors are indexed, i.e. numbered, using the so called floating conductors in EMS.

Meshing

In this  benchmark, the meshing is rather straightforward since the geometry does entail small regions and gaps. Thus, the global element size is set to 2 mm with a mesh tolerance of 0.1 mm. To achieve a good accuracy without increasing the total number of mesh elements, it is recommended to apply a mesh control to the regions where a large variation is expected. Two locals mesh control of 0.5 mm and 0.25 mm are applied to the six conductors and to dielectric layers, respectively. Figure 3 shows the resulting mesh.

Mesh of the structure without the air region

Figure 3 - Mesh of the structure without the air region

Results

After a successful run, the Electrostatic module produces three result folders and a result table. The folders contain the electric field E, the electric displacement D, the potential distribution V, respectively. The results table contains the capacitance matrix. Furthermore, all of the results can be visualized in various formats such as fringe, vector, contour, section, line, and, clipping plots. The results can easily be zoomed-in, exported, and dissected.

For this particular benchmark, the capacitance matrix is compared against the reported results in [1]. As Table 2 indicates, the results of EMS match those reported by the authors of [1].  You can think of EMS as capacitance calulator for interconnects and VLSI. 

Cij (pF)
conductor-1
conductor-2
conductor-3
conductor-4
conductor-5
conductor-6
conductor-1
0.745
-0.158
-0.123
-6.515 e-03
-2.807 e-02
-4.566 e-03
conductor-2
-0.158
1.369
-0.210
-0.145
-3.278 e-02
-2.885 e-02
conductor-3
-0.123
-0.210
1.743
-0.172
-0.256
-0.262
conductor-4
-6.516 e-03
-0.145
-0.172
1.689
-0.265
-0.267
conductor-5
-2.807 e-02
-3.277 e-02
-0.256
-0.265
3.469
-5.154 e-02
conductor-6
-4.566 e-03
-2.885 e-02
-0.262
-0.267
-5.154 e-02
3.448

Table 2 - Capacitance matrix (in pF) obtained by EMS

 

 
C11
C22
C33
C44
C55
C66
DDM
0.680
1.29
1.57
1.52
2.54
2.54
Spice Link
0.669
1.29
1.60
1.54
2.53
2.53

Table 3 - The self capacitance terms (in pF) as reported in [1]

 

References

[1] Zhenhai Zhu, Hao Ji, Wei Hong, "An Efficient Algorithm for the Parameter Extraction of 3-D Interconnect Structures in the VLSI Circuits: Domain-Decomposition Method," IEEE Transactions on Microwave Theory and Techniques, vol. 45, no. 8, August 1997, pp. 1179-1184.